phy_write(int reg, u16 value)
{
int i;
/* Fill the phyxcer register into REG_0C */
DM9000_iow(DM9000_EPAR, DM9000_PHY | reg);
/* Fill the written data into REG_0D & REG_0E */
DM9000_iow(DM9000_EPDRL, (value & 0xff));
DM9000_iow(DM9000_EPDRH, ((value >> 8) & 0xff));
DM9000_iow(DM9000_EPCR, 0xa); /* Issue phyxcer write command */
//udelay(500); /* Wait write complete */
i=0;
while(DM9000_ior(DM9000_EPCR) & 0x01)
{
udelay(100);
i++; //替换 udelay(500)
if(i==1000)
{
printf("DM9000 access error\n");
return 0;
}
}
DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer write command */
DM9000_DBG("phy_write(reg:0x%x, value:0x%x)\n", reg, value);
}
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