平台：
CentOS 5.4
arm-linux-gcc 3.4.1
uC/OS V2.52
CPU：s3c2410（arm9）
要使uC/OS-II正常运行，处理器必须满足以下要求：
（1）处理器的C编译器能产生可重入型代码；
（2）处理器支持中断，并且能产生定时中断（通常10-100Hz）；
（3）用C语言可以开/关中断；
（4）处理器能支持一定数量的数据存储硬件堆栈（可能是几千字节）；
（5）处理器有将堆栈指针以及其他CPU寄存器的内容读出、并存储到堆栈或内存中去的指令。
为了移植uC/OS-II，需要提供几个文件：
os_cpu.h
os_cpu_a.S
os_cpu_c.c
os_cfg.h
includes.h
1、os_cpu.h
主要包括与编译器有关的数据类型定义；
处理器开关中断函数定义
堆栈方向定义；
任务切换函数定义；
其他函数声明。
//全局变量定义
#ifndef __OS_CPU_H__
#define __OS_CPU_H__
#define __OS_CPU_H__
#ifdef OS_CPU_GLOBALS
#define OS_CPU_EXT
#else
#define OS_CPU_EXT extern
#endif
#define OS_CPU_EXT
#else
#define OS_CPU_EXT extern
#endif
typedef unsigned char BOOLEAN;
typedef unsigned char INT8U;
typedef unsigned char INT8U;
typedef signed char INT8S;
typedef unsigned int INT16U;
typedef signed int INT16S;
typedef unsigned long INT32U;
typedef signed long INT32S;
typedef float FP32;
typedef double FP64;
typedef unsigned int INT16U;
typedef signed int INT16S;
typedef unsigned long INT32U;
typedef signed long INT32S;
typedef float FP32;
typedef double FP64;
typedef unsigned int OS_STK; //堆栈入口宽度16位
typedef unsigned int OS_CPU_SR; //CPU状态寄存器的宽度16位
typedef unsigned int OS_CPU_SR; //CPU状态寄存器的宽度16位
#define BYTE INT8S //与1.x版兼容
#define UBYTE INT8U
#define WORD INT16S
#define UWORD INT16U
#define LONG INT32S
#define ULONG INT32U
#define WORD INT16S
#define UWORD INT16U
#define LONG INT32S
#define ULONG INT32U
/*
* ARM
*
* Method #1: Disable/Enable interrupts using simple instructions. After critical section, interrupts
* will be enabled even if they were disabled before entering the critical section.
*
* Method #2: Disable/Enable interrupts by preserving the state of interrupts. In other words, if
* interrupts were disabled before entering the critical section, they will be disabled when
* leaving the critical section.
*
* Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
* would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
* disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
* disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
* into the CPU's status register.
*
*/
* ARM
*
* Method #1: Disable/Enable interrupts using simple instructions. After critical section, interrupts
* will be enabled even if they were disabled before entering the critical section.
*
* Method #2: Disable/Enable interrupts by preserving the state of interrupts. In other words, if
* interrupts were disabled before entering the critical section, they will be disabled when
* leaving the critical section.
*
* Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
* would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
* disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
* disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
* into the CPU's status register.
*
*/
#define OS_CRITICAL_METHOD 3 //我们使用方式3
#if OS_CRITICAL_METHOD == 3
#define OS_ENTER_CRITICAL() (cpu_sr = OSCPUSaveSR()) /* Disable interrupts */
#define OS_EXIT_CRITICAL() (OSCPURestoreSR(cpu_sr)) /* Restore interrupts */
#endif
#define OS_ENTER_CRITICAL() (cpu_sr = OSCPUSaveSR()) /* Disable interrupts */
#define OS_EXIT_CRITICAL() (OSCPURestoreSR(cpu_sr)) /* Restore interrupts */
#endif
#define OS_STK_GROWTH 1 /* 堆栈：向下递减 */
#define OS_TASK_SW() OSCtxSw() //任务切换函数定义
//其他函数声明
void UCOS_IRQHandler(void);
void OSCtxSw(void);
void OSIntCtxSw(void);
void OSCtxSw(void);
void OSIntCtxSw(void);
#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
OS_CPU_SR OSCPUSaveSR(void);
void OSCPURestoreSR(OS_CPU_SR cpu_sr);
#endif
OS_CPU_SR OSCPUSaveSR(void);
void OSCPURestoreSR(OS_CPU_SR cpu_sr);
#endif