Makefile之小例（三）

1. 简单Makefile将分布在不同目录文件夹里面的c文件编译成对应的.o文件，然后连接所有的.o文件生成可执行文件：

CC = gcc
SRC_PATH = ./  ./src/
CFLAGS = -c -Wall -O2
LDFLAG =
TARGET = test
SRC = $(foreach pa_th, $(SRC_PATH), $(wildcard $(pa_th)*.c))
OBJECT = $(patsubst %.c, %.o, $(SRC))
INCLUDE = $(sort $(addprefix -I, $(dir $(SRC))))



all:$(TARGET)

$(TARGET):$(OBJECT)
$(CC) $^ $(LDLAG) -o $@
$(OBJECT): %.o :%.c
$(CC) $(CFLAGS) $< $(INCLUDE) -o $@
clean:
-rm -rf *.o test

.PHONY:clean