stm32 PWM产生

1330阅读　0评论2018-07-15　albert_shao
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  1. /* TIM Configuration */
  2.   TIM_Config();

  4.   TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);

  6.   TIM_OCStructInit(&TIM_OCInitStructure);

  8.   /* ---------------------------------------------------------------------------
  9.      TIM8 is configured to generate an Asymetric signal with a programmable
  10.      Phase-Shifted signal on TIM8_CH2:
  11.      - TIM8 Channel 1 is configured in PWM2 mode
  12.      - TIM8 Channel 2 is configured in Asymetric PWM2 mode
  13.      - The counter mode is center aligned mode
  14.      - The pulse length and the phase shift are programmed consecutively in TIM8_CCR2 and TIM8_CCR1.

  16.      TIM1 is configured to generating the reference signal on Channel1 used by TIM8:
  17.      - TIM1 is generating a PWM signal with frequency equal to 1.5KHz
  18.      - TIM1 is used as master for TIM8, the update event of TIM1 genarates the Reset counter
  19.      of TIM8 to synchronize the two signals: the reference signal (TIM1_CH1) and
  20.             the shifted signal (TIM8_CH2).
  21.     
  22.     In this example TIM1 and TIM8 input clock (TIM18CLK) is set to APB2 clock (PCLK2)
  23.     TIM1 and TIM8 signals are at frequency of (SystemCoreClock / (PWM_FREQUENCY + 1))
  24.                
  25.     TIM8 is gerating a signal with the following caracteristics:
  26.      - Pulse lenght = (TIM8_CCR1 + TIM8_CCR2) / TIM8_CLK
  27.      - Phase shift = TIM8_CCR1/TIM8_CLK
  28.      with TIM8_CLK = (SystemCoreClock / (Period + 1)), as the prescaler is equal to zero.
  29.     
  30.     Note:
  31.      SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f30x.c file.
  32.      Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate()
  33.      function to update SystemCoreClock variable value. Otherwise, any configuration
  34.      based on this variable will be incorrect.
  35.   --------------------------------------------------------------------------- */
  36.   /* Initialize Timers: TIM1 & TIM8 */
  37.   /* Time base configuration for TIM8 and TIM1 */
  38.   TIM_TimeBaseStructure.TIM_Period = PWM_FREQUENCY;     //
  39.   TIM_TimeBaseStructure.TIM_Prescaler = 0;        // this prescaler is 1
  40.   TIM_TimeBaseStructure.TIM_ClockDivision = 0;

  42.   /* First wrong parameter: Counting Mode,TIM8 counting direction has to be set to center-aligned mode */
  43.   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1;
  44.   
  45.   TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
  46.   
  47.     //??????????TIM8?????ì???????????ú????·??????è??????????????·?????????·???????????????????????
  48.   TIM_TimeBaseStructure.TIM_Period = 2 * PWM_FREQUENCY;        // 1??PWM?¨???????è?¨
  49.   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
  50.   TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

  52.   /* Channels 1&2 configuration on TIM8 */
  53.   TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
  54.   TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  55.   TIM_OCInitStructure.TIM_Pulse = INITIAL_PHASE;
  56.   TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
  57.   TIM_OC1Init(TIM8, &TIM_OCInitStructure); /* Channel1 config done */
  58.   
  59.   /* Second wrong parameter: PWM Mode */
  60.   /* The same PWM mode has to be configured for the two coupled channels */
  61.   TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Asymmetric_PWM2;

  63.   TIM_OCInitStructure.TIM_Pulse = INITIAL_LENGTH;
  64.   TIM_OC2Init(TIM8, &TIM_OCInitStructure); /* Channel2 config done */
  65.   
  66.   /* Channel1 configuration on TIM1 */
  67.   TIM_OCInitStructure.TIM_Pulse = 2 * PWM_FREQUENCY / 10 * 0.9;        // 2??PWM ????±?
  68.   TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
  69.   TIM_OC1Init(TIM1, &TIM_OCInitStructure);

  71.   /* Enable outputs on both TIM1 & TIM8*/
  72.   TIM_CtrlPWMOutputs(TIM8, ENABLE);
  73.   TIM_CtrlPWMOutputs(TIM1, ENABLE);

  75.   /* Synchronization between TIM1 and TIM8
  76.   The aim is to generate a reference signal on TIM1_CH1
  77.   The Phase-Shifted siganl generated on TIM8_CH2 is compared to the reference
  78.   signal
  79.   */
  80.   TIM_SelectSlaveMode(TIM8, TIM_SlaveMode_Reset); /* Configure TIM8 in slave
  81.   mode: an active edge on trigger input generates a reset on tIM8 */
  82.   
  83.   TIM_SelectInputTrigger(TIM8, TIM_TS_ITR0); /* Connect TIM1 to TIM8
  84.   TIM1 is the Master
  85.   TIM8 is the Slave */
  86.   
  87.   TIM_SelectOutputTrigger(TIM1,TIM_TRGOSource_Update); /* Select the Update
  88.   to be the Master Trigger-Out TRGO signal origine */
  89.   
  90.   TIM_CCPreloadControl(TIM8, ENABLE); /* Enable Shadaw register on TIM8
  91.   CCRx register are not accessed directly: their content is updated each Update
  92.   event */
  93.   
  94.   /* TIM8 enable counter */
  95.   TIM_Cmd(TIM1, ENABLE);
  96.   TIM_Cmd(TIM8, ENABLE) 
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